Surface passivation of semiconductor circuit elements with layer of wideband semiconductor

Protective surface passivation of semiconductor elements for circuit integration is studied experimentally on Al-SiO2-ZnP2-Si structures and evaluated theoretically on the basis of the MOS*S-structure model. Specimens for this study are built on n-Si and p-Si single crystals with high electrical resistivity rho approx. = 7.75 ohm.cm) and with orientation in the 111 plane or the 100 plane. Layers of beta-ZnP2 are deposited by vacuum evaporation to various thicknesses of 0.1 to 1.2 microns. Data on charge redistribution in the ZnP2-Si system are obtained by measurement of high-frequency capacitance-voltage characteristics, 1 MHz having been empirically found to be the most suitable test frequency. The results reveal that the capacitance of structures on high-resistivity silicon depends on both the magnitude and the sign of dV/dt, unlike the capacitance of structures on strongly doped low-resistivity (rho - 0.01 ohm.cm) silicon, this dependence being related to modulation of the space-charge region in the Si substrate. The state of this space-charge region in an Al-SiO2-ZnP2-Si structure almost corresponds to the state of flat energy bands. With a thin ZnP sublayer (d 0.4 micrometers, this space-charge region is controlled even by a dV/dtt 0.01 V/s. With a thick ZnP2 sublayer (d 2L sub Dubye), on the other hand, the charge in the SiO2 layer has almost no influence on the state of the space-charge region in the Si layer. Therefore, a sufficiently thick ZnP2 sublayer (d 0.7 micrometer) ensures a voltage-independent capacitance of the structure approximately corresponding to the state of flat energy bands in Si.