An advanced bipolar-MOS-I(2)L technology with a thin epitaxial layer for analog-digital VLSI

A novel Bi-MOS technology, Advanced Bipolar CMOS, is proposed. Bipolar transistors (n-p-n, p-n-p, I(2)L) and MOS transistors (both n-and p-channel) have been successfully fabricated on the same chip with no decrease in performance by using a 3-micron design rule. Thin epitaxial layer (less than about 2 microns) is used in order to obtain small-size, high-performance (3-GHz) bipolar devices. Device size is reduced by using a shallow junction and self-aligning technique. N-channel MOS transistors are formed in p-well regions designed to reach p-type substrate, and p-channel MOS transistors are formed in epitaxial layer with an n(+) buried layer. This technology has the potential for monolithic multifunctional analog-digital VLSI.