High or low-side solid state relay with current limiting and operational testing

The switch comprises a circuit from a first output terminal via parallel MOS devices in series with current-sensing resistance to a second output terminal, with alternative high-side and low-side configurations having a load between the second terminal and ground, or the first terminal and the DC supply voltage. An input terminal for a digital control signal is coupled via an input diode and two Schmitt Trigger CMOS inverters to a control lead for the gates of the switch. A current overload or short circuit protection circuit coupled between the current-sensor and the input diode comprises two transistors coupled by a diode. A built-in test circuit for indicating the switch condition (on, off, shorted or open) comprises MOS transistors having their gates connected to voltage dividers at the two output terminals, and their drains connected to discrete indication terminals.