The effects of cooling on delay-time limits in IC's
Abstract
The effect of cooling as a fundamental limit to delay times in IC's was considered. It appears that the delay time should be decreased at cryogenic temperatures.
- Publication:
-
In JPL Proc. of the Cold Electronics Workshop p 70-82 (SEE N85-24220 14-33
- Pub Date:
- November 1984
- Bibcode:
- 1984coel.work...70G
- Keywords:
-
- Cooling;
- Delay;
- Integrated Circuits;
- Low Temperature;
- Power Efficiency;
- Time Lag;
- Dielectric Properties;
- Models;
- Operating Temperature;
- Semiconductor Devices;
- Electronics and Electrical Engineering