Programmable signal processing device

The device performs a function for image processing, where W; are fixed weights for any specific application. It uses a PROM and accumulator algorithm, in which the memory stores the values. In 2(M) words, with addresses formed from one bit of each data word in a given bit position. In operation the most significant bit of each data word is used first to address memory, and in successive clock cycles the other bit positions are used down to the least significant. The memory output words are supplied to the adder-accumulator, and in each clock cycle the adder-accumulator output is shifted left one bit and used as a second input thereof. Then if the data words have N bits designated j=0 to N-1, after N clock cycles the memory output words have each been effectively multiplied by 2(J) and accumulated in the sum.