An extractor for hierarchial symbolic layouts
Abstract
A circuit extractor for extracting VLSI circuits from a hierarchical symbolic layout description is proposed. An interface file stores the interface between layout and circuit description for each hierarchical building block. The hierarchy of the circuit description can be expanded partially or wholly to let the extracted circuit description have the hierarchy as required by the user. The algorithm on which the extractor is based is discussed. Results of a preliminary version are presented.
- Publication:
-
NASA STI/Recon Technical Report N
- Pub Date:
- December 1984
- Bibcode:
- 1984STIN...8632659B
- Keywords:
-
- Circuit Diagrams;
- Layouts;
- Very Large Scale Integration;
- Algorithms;
- Computer Aided Design;
- Hierarchies;
- Electronics and Electrical Engineering