Ratio-Independent Algorithmic Analog to Digital Conversion Techniques

This thesis reports on an investigation on algorithmic analog to digital conversion techniques in achieving high resolution and linearity A/D converters, implemented using metal-oxide-semiconductor large scale integration. With this technique, high resolution converters can be realised within a small area. A simple ratio-independent switching algorithm has been devised to overcome the gain error of MOS gain blocks that employs capacitor for the gain-setting. Using a delayed timing control scheme and a differential circuit implementation to cancel the charge injection from MOS transistors, high monotonicity and linearity can be achieved without the need for capacitor matching. As a test vehicle an experimental integrated circuit has been fabricated using a 5-micron CMOS process. The converter showed monotonicity of 12 bits operating at a sampling frequency up to 8 kHz. The integral linearity error was 3.21sb. Total chip area for the analog circuit part of the converter was less than 2400mil('2).