Multiplierless implementations of MF/DTMF receivers
Abstract
The abundant processing power of a VLSI chip together with certain constraints regarding the design of the chip have an effect on the digital signal processing (DSP) algorithms and the architectures of DSP systems. The present investigation is concerned with the employment of cells which correspond to basic filters of certain types. The advantages of these cells for DSP is demonstrated with the aid of the design of an MF/DTMF receiver which satisfies the requirements of a switching and transmission system for telecommunications. The dual-tone-multifrequency (DTMF) receiver principle is discussed along with aspects of DTMF receiver design, and questions of multifrequency (MF) receiver design.
- Publication:
-
IEEE Transactions on Communications
- Pub Date:
- July 1984
- Bibcode:
- 1984ITCom..32..839A
- Keywords:
-
- Digital Systems;
- Frequency Division Multiplexing;
- Radio Receivers;
- Signal Processing;
- Very Large Scale Integration;
- Voice Communication;
- Chips (Electronics);
- Frequency Response;
- High Pass Filters;
- Low Pass Filters;
- Network Synthesis;
- Systems Engineering;
- Electronics and Electrical Engineering