A 3-D graphics display system with depth buffer and pipeline processor
Abstract
Algorithms are described for high-speed production of color-shaded, three-dimensional raster images. The algorithms are intended for use with a terminal that has a depth buffer for hidden surface removal, a processing speed of 10,000 polygons/sec, smooth shading, initializing, subpixel addressability and detail, transparency, local segment memory, a three-dimensional cursor, an any-angle cutting plane, local viewing transformation and contouring capabilities. The terminal interfaces with the computer through a 68,000 chip. The algorithm features fixed-point arithmetic operations and interfaces with a pipelined digital signal processor. Applications are foreseen in CAD, training simulators and animation.
- Publication:
-
IEEE Computer Graphics Applications
- Pub Date:
- June 1984
- Bibcode:
- 1984ICGA....4...11F
- Keywords:
-
- Computer Graphics;
- Display Devices;
- Image Processing;
- Pipelining (Computers);
- Algorithms;
- Animation;
- Computer Aided Design;
- Computerized Simulation;
- Microprocessors;
- Systems Engineering;
- Engineering (General)