Direct formulation of circuit equations in the bordered lower triangular form

This paper introduces a new procedure for the direct formulation of circuit equations into a bordered lower triangular form, which minimizes the width of the bordered matrices. The variables used in the right bordered matrix are a subset of circuit node voltages. This formulation is intended for Circuit Analysis Programs to speed up simulation of large stiff electrical and electronic systems like LSI or VLSI circuits. Rules for the compilation of circuit equations in the above defined form are presented. The developed procedure is illustrated by examples representing different classes of electrical circuits. The computational advantages of the formulation are outlined and discussed.