A microprogrammed bitsliced adaptive MTI processor

A bit-sliced CPU-based architecture for the implementation of an adaptive MTI processor is presented. The implementation is based on the approach proposed by Babu and Prasad (1983) for MTI processing, which is efficient in terms of memory and speed costs. The proposed architecture has the usual advantages of the microprogrammed implementation (ease of development testing, flexibility, etc.). A real-time 3-tap (and 4-tap) adaptive filter has been implemented using this approach.