Synthesis algorithm for minimal components in T-ulm networks
Abstract
An algorithm has been developed and programmed in Pascal to design T-ULM networks for MVL systems with up to 6 r-valued inputs (r from 2 to 5). The algorithm is based on a special form of T-ULM formed from threshold detectors and switches. The objective of the algorithm is to minimize the total number of components (thresholds and switches) and also the total number of T-ULM's. Techniques are presented that make optimal use of don't care conditions in the functional specification.
- Publication:
-
The 13th Intern. Symp. on Multiple-Valued Logic
- Pub Date:
- 1983
- Bibcode:
- 1983mvl..symp..408K
- Keywords:
-
- Computer Networks;
- Gates (Circuits);
- Logic Circuits;
- Mathematical Logic;
- Algorithms;
- Conferences;
- Digital Systems;
- Electronic Modules;
- Switching Circuits;
- Threshold Logic;
- Electronics and Electrical Engineering