The implementation and use of multivalued logic in a VLSI environment

In this paper, multiple valued logic is discussed in terms of its implementation by PLAs. The history of the PLA is described and the relevance of multivalued logic to PLA development and logic minimization is discussed. An important aspect of VLSI implementation is used as a parameter to compare binary logic circuits with multiple valued logic circuits and certain conclusions are reached. The functional usefulness of n-valued Post logics is identified in terms of various applications.