High-speed Viterbi decoding of high-rate codes
Abstract
This paper analyzes the problems of implementing high-speed Viterbi decoding and demonstrates that practical 120-Mbit/s digital decoders of moderate complexity can be built with currently available emitter-coupled logic. The results are generally applicable to a variety of high-speed applications, although specific details are based upon rate 2/3 codes for use with 8-PSK modulation. Metric computation is simplified by demodulating each 8-phase symbol into quadrature I and Q components, rather than three separate output channels.
- Publication:
-
6th International Conference on Digital Satellite Communications
- Pub Date:
- 1983
- Bibcode:
- 1983dsc..confU....S
- Keywords:
-
- Communication Satellites;
- Decoders;
- Error Correcting Codes;
- Pulse Communication;
- Viterbi Decoders;
- Digital Filters;
- Hardware;
- Phase Shift Keying;
- Signal Processing;
- Time Division Multiple Access;
- Communications and Radar