The V BUS Family - Candidate for common use with VLSI technology

The V BUS Family interconnect method for VLSI technologies defines the low level protocols required by interconnected electronics. The interrelationships among the large number of operationally distinct buses allow a large portion of the total number of possible buses to be implemented with a single bus interface design, and with a reasonable number of gates. The V BUS Family is most appropriately applied in interconnecting adjacent chips, cards, and chassis, due to the design of its electrical protocols with a view to high speed operation over relatively short distances.