A data structure for VLSI synthesis and verification
Abstract
This document describes a VLSI design representation developed at USC as part of the USC Expert Synthesis System project. The data structure is implementation-independent and can be regarded as a general hardware design representation schema. It is characterized by four nonisomorphic hierarchies, which collectively describe the system under design. It is useful for the analytic detection of some kinds of design errors.
- Publication:
-
NASA STI/Recon Technical Report N
- Pub Date:
- October 1983
- Bibcode:
- 1983STIN...8420769K
- Keywords:
-
- Computer Aided Design;
- Data Structures;
- Expert Systems;
- Very Large Scale Integration;
- Data Bases;
- Digital Computers;
- Hierarchies;
- Orthogonality;
- Semantics;
- Syntax;
- Systems Engineering;
- Electronics and Electrical Engineering