Gate array layout using CADDS 2

Enhancements made to CADDS 2 using defined commands and ICPL programs to aid in the manual layout and checking of gate array designs are described. A special menu for gate array layout which allows users access to these enhanced capabilities were established. Some of these enhanced capabilities include automatic round off of metal lines to valid routing channels, automatic placement of I/O cells, and rudimentary schematic extraction. These enhancements have made more than a factor of five improvement in our productivity.