Simulation of a binary phase-locked loop
Abstract
Simulation of a binary phase-looked loop (BPLL), the synchronizing circuit in the Aircraft Security Radar System is described. The BPLL's operation is explained, the simulating algorithm described, and simulations of the BPLL exemplified to illustrate how performance is optimized by adjustment of loop filter parameters.
- Publication:
-
NASA STI/Recon Technical Report N
- Pub Date:
- January 1983
- Bibcode:
- 1983STIN...8335283G
- Keywords:
-
- Computerized Simulation;
- Digital Systems;
- Phase Locked Systems;
- Synchronism;
- Algorithms;
- Error Functions;
- Frequency Assignment;
- Optimization;
- Phase Shift;
- Pulse Rate;
- Radar;
- Electronics and Electrical Engineering