A transient Poole-Frenkel effect at the semiconductor surface of MAOS devices

The generation of the inversion layer in MOS and MAOS structures shows remarkable differences. Whereas for MOS samples free minority carriers build up the inversion layer, the positive layer in n-type silicon MAOS devices is mainly caused by a trap charging process. This trap charging shows peculiar properties. After a voltage step which depletes the semiconductor surface from majority carriers the gate current has a maximum at a time of about 10 ^-4s after the step. This current which is proved to be related to the increase of the trap charge is strongly temperature and field dependent. It is shown that the time dependent maximum in the current is caused by a transient Poole-Frenkel effect at the semiconductor surface.