Signal delay in RC tree networks

A computationally efficient method for calculating the signal delay through MOS interconnect lines with fanout is described. Tight upper and lower bounds for the step response of RC trees are presented together with linear-time algorithms for these bounds from an algebraic description of the tree. Substantial computational simplicity is achieved even in the presence of RC distributed lines by representing the RC tree by a small set of suitably defined characteristic times which can be easily calculated and used to generate the bounds.