Design and optimization of digital filters without multipliers

A method to design digital filters without multipliers is presented. The process requires no approximations. First, a second order structure, such as the first canonic form, is realized with coefficients in the CSD-Code. As a rule, equivalent structures then permit the reduction of either the number of adders or the time tau sub y needed to calculate one sample at the output or, in some cases permit the reduction of both simultaneously. As an example a part of a PCM lowpass with 50 Hz suppression is designed and optimized. For this circuit tau sub y = 2(tau sub A), with tau sub A the time needed for one addition; tau sub A = 30 ns allows for a sampling frequency of up to 16.5 MHz.