Verify and extend VLSI device models
Abstract
The objective of the contract were to develop circuit simulation models for SPICE for 1-micron geometry and study the physics of MOS devices to find extensions needed to develop circuit simulation models for submicrometer and SOI devices. The tasks in the program were: Task 1 - Fabricate and extensively characterize short-channel (1- to 5-micron) MOSFETs to develop a model; Task 2 - Install and verify the Standford University process device programs; Task 3 - Model Verification; and Task 4 - Extension of MOSFET Model to Submicrometer and SOI Devices.
- Publication:
-
Final Report
- Pub Date:
- May 1982
- Bibcode:
- 1982ti...reptR....L
- Keywords:
-
- Computerized Simulation;
- Field Effect Transistors;
- Integrated Circuits;
- Large Scale Integration;
- Metal Oxide Semiconductors;
- Accuracy;
- Capacitance;
- Fabrication;
- Gates (Circuits);
- Substrates;
- Thickness;
- Electronics and Electrical Engineering