PAD: A fault tolerance specific circuit
Abstract
A fault tolerance specific circuit, designed to reduce cost in the number of units of a safe operating structure, PAD is based on a general architecture with duplication of central units and a duplication or a coding of memory blocks and of inputs/outputs. The operations performed by PAD are described and presented in the form of peripheral, programmable circuit of 6800 microprocessor family. Circuit diagrams for PAD, the programming of the circuit and of the mode for executing instruction, and self-checking at the level of PAD are considered.
- Publication:
-
Reliability and Maintainability
- Pub Date:
- September 1982
- Bibcode:
- 1982rema.rept..117C
- Keywords:
-
- Distributed Parameter Systems;
- Fault Tolerance;
- Integrated Circuits;
- Logic Circuits;
- Microprocessors;
- Central Processing Units;
- Error Detection Codes;
- Implantation;
- Operating Systems (Computers);
- Reliability;
- Synchronism;
- Electronics and Electrical Engineering