A study of an arbiter function in the structures of a shared bus
Abstract
The results of a comparative study of synchronous and asynchronous arbiters for managing user access to a shared bus is presented. The best available method is determined to be modular arbiter structures attached only to the decision module. Linear and circular arbitration strategies are examined for suitability for automatic decision-making. A multiple strategies arbiter scheme is devised, involving the superposition of various strategies of one sequential machine into another. It is then possible to modify the strategy on-line if the current strategy is ineffective. The utilization of a multiple structure of cascading arbiter devices is noted to be effective if response time is not a critical matter. Finally, attention is given to automatic circuit testing and fault detection. An example is furnished in terms of a management system for a shared memory in a multimicroprocessor structure.
- Publication:
-
Ph.D. Thesis
- Pub Date:
- 1982
- Bibcode:
- 1982PhDT........22S
- Keywords:
-
- Cascade Control;
- Computer Design;
- Decision Making;
- Distributed Processing;
- Microprocessors;
- Time Sharing;
- Architecture (Computers);
- Error Detection Codes;
- Logic Circuits;
- Logical Elements;
- Multiprocessing (Computers);
- Reliability Analysis;
- Electronics and Electrical Engineering