Single event error immune CMOS RAM

The use of resistive decoupling techniques to upgrade the memory cells on a 1024-bit CMOS static RAM to provide immunity to single event upset by cosmic rays is reported. The configuration was developed after tests demonstrated that the devices, intended for space applications, were sensitive to the occurrence of single energetic heavy Fe, Kr, and Ar ions collisions. The concept involves the placement of series resistors in the cross-coupling lines of the inverter pairs of memory cells. This inhibits the cosmic-ray charge induced in a drain depletion region from causing destabilization of the logic state due to changes in the gate voltages by reducing the maximum amount of change. The design and fabrication technique are discussed and computer simulation verification is reported. Laboratory measurements indicated a threshold bias for error onset between 2-4 V. At 5 V the resistance needed is near 90 k-ohms.