A radiation-hardened 1K-bit dielectrically isolated random access memory

The design, technology, and results of 1024-bit dielectrically isolated RAM are presented. The RAM description and process description are given and the circuit performance is discussed. The circuit is designed with common data in and data out pins and is assembled in a standard 16-pin package. A functional block diagram is shown. The design uses low power Schottky TTL techniques with photocompensation diodes and other provisions to achieve radiation hardness. The memory cell consists of two cross-coupled Schottky clamped transistors with two 22-K-omega polysilicon load resistors. The memory cell schematic and layout is shown and a summary of AC and DC results obtained on the RAM versus design goals are presented. Results are also presented for radiation tests conducted with three exposures of 1 MRad(Si), 1 MRad(Si), and 6.7 MRad(Si), at about hourly intervals.