Submicrometer MOSFET structure for minimizing hot-carrier generation

Channel hot-carrier generation in NMOS FETs is investigated for various device structures in a search for structures suitable for scaling down to the submicrometer level. The dependence of channel hot-carrier generation on device structures is characterized by measuring the gate current and the substrate current as low as on the order of 10 to the -15th A, and the measured gate current due to hot electron injection is numerically modeled as thermionic emission from heated electron gas over the Si-SiO2 energy barrier. Two device structures are proposed for minimizing the hot carrier generation and associated problems in submicrometer MOSFETs, which prove to be feasible as building elements of VLSIs. The influence of electron-beam radiation on the gate oxide is also discussed in relation to the trapping of hot electrons.