Low 1/f noise design of Hi-CMOS devices
Abstract
The low-frequency noise characteristics of CMOS devices fabricated with a high-performance CMOS(Hi-CMOS) process technology are examined in order to study their effect on analog circuits using Hi-CMOS devices. Low-frequency noise characteristics for MOSFETs scaled down to a mask level of 2 microns are reported, and the quantitative dependence of the noise on effective channel length, the frequency spectrum of the noise in the 2-micron MOSFETs, and their relation to the theoretical model are discussed. Optimum device design for the reduction of 1/f noise in CMOS differential amplifiers is also discussed.
- Publication:
-
IEEE Transactions on Electron Devices
- Pub Date:
- February 1982
- DOI:
- 10.1109/T-ED.1982.20699
- Bibcode:
- 1982ITED...29..296A
- Keywords:
-
- Cmos;
- Field Effect Transistors;
- Integrated Circuits;
- Low Noise;
- Network Synthesis;
- N-Type Semiconductors;
- P-Type Semiconductors;
- Power Spectra;
- Threshold Currents;
- Electronics and Electrical Engineering