Chip-to-chip driver and receiver circuits for a Josephson computer
Abstract
Requirements for drivers and receivers in a Josephson computer are described for transmission of logic signals over long lines and through package connectors. A driver with noise protection and rise time control for smooth propagation through inductive discontinuities has been designed. The receiver design incorporates polarity discrimination for rejection of signals stored on a long line. Drivers and receivers were fabricated, polarity discrimination was demonstrated, and delays were measured and found to agree with simulations. Nominal driver-receiver delay is 160 ps.
- Publication:
-
IEEE Journal of Solid-State Circuits
- Pub Date:
- August 1982
- DOI:
- Bibcode:
- 1982IJSSC..17..739K
- Keywords:
-
- Chips (Electronics);
- Computer Systems Performance;
- Josephson Junctions;
- Network Analysis;
- Receivers;
- Transmission Circuits;
- Electronic Packaging;
- Gates (Circuits);
- Logic Circuits;
- Electronics and Electrical Engineering