Substrate effects on performance of InP MOSFETs
Abstract
InP MOSFET devices with a SiO2 dielectric layer have been fabricated on p-type and SI substrates. Surface mobilities in the range 250 to 750 sq cm/V-s have been routinely obtained from all substrates except those from one crystal of Fe-doped SI InP. Defect etching studies have revealed large prismatic dislocation loops in this crystal. A correlation between these observations is proposed.
- Publication:
-
Electronics Letters
- Pub Date:
- May 1982
- DOI:
- 10.1049/el:19820285
- Bibcode:
- 1982ElL....18..415W
- Keywords:
-
- Field Effect Transistors;
- Indium Phosphides;
- Metal Oxide Semiconductors;
- Performance Tests;
- Substrates;
- Fabrication;
- Microstructure;
- Oxide Films;
- Silicon Dioxide;
- Electronics and Electrical Engineering