Implementation of microprocessors in trellis decoding of convolutional codes

The digital circuit in a trellis decoder of convolutional codes has a greater complexity than other channel coding-decoding techniques. The complexity grows exponentially with the constraint length of the code, i.e. it is proportional to the number of branches of its state transition diagram. It is shown that use of a common 8-bit microprocessor can help overcome the complexity of these coding and decoding techniques. Short constraint length convolutional codes can save valuable data from being spoiled by patterns of noise or sparks in the storing or transmission media. Designing the bit-slice microprocessor according to the decoder's function can improve the speed to cover many practical channels. Results of the speed of a trellis decoder for some conventional microprocessor systems are presented, and some space against speed trade-offs are discussed.