Grain boundaries in silicon as analogs of surfaces

The electrical behavior of grain boundaries in silicon is investigated. Results of studies using several polycrystalline Si materials show that the potential barriers at grain boundaries are nearly negligible before annealing but grow markedly at 900-1000 C. In addition, it is found that the crystalline orientations have little to do with the existence of barriers, the chemical condition of the boundaries dominates their electronic behavior, the boundaries are quite free of impurities before heating, and annealing creates barriers by causing dissolved oxygen to segregate at boundaries. It is concluded that the electronic properties of these boundaries are very much like those of surfaces.