Theory and implementation of a fast algorithm linear equalizer
Abstract
The theory and implementation of a multiplication-free linear mean-square error criterion equalizer for data transmission are considered. For many real-time signal processing situations, a large number of multiplications is objectionable. The linear estimation problem on a binary computer is considered where the estimation parameters are constrained to be powers of two and thus all multiplications are replaced by shifts. The optimal solution is obtained from an integer-programming-like problem except that the allowable discrete points are non-integers. The branch-and-bound algorithm is used to obtain the coefficients of the equalization TDL. Specific experimental performance results are given for an equalizer implemented with a 12 bit A/D device and a 8080 microprocessor.
- Publication:
-
ICC 1981; International Conference on Communications, Volume 2
- Pub Date:
- 1981
- Bibcode:
- 1981icc.....2...30Y
- Keywords:
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- Data Transmission;
- Equalizers (Circuits);
- Linear Prediction;
- Parameter Identification;
- Signal Detection;
- Algorithms;
- Intel 8080 Microprocessor;
- Mathematical Programming;
- Real Time Operation;
- Root-Mean-Square Errors;
- Signal Processing;
- Communications and Radar