Digital beamformer implementation considerations

Various concepts aiding in the implementation of discrete-time beamformers are presented, and the associated hardware considerations, primarily in the areas of analog-to-digital (A/D) conversion, input data storage, and computation throughput, are discussed. The delay-sum technique is shown to require a large amount of data storage and a high input data sampling rate for most applications. Even though the input data storage requirement is reduced significantly with the partial-sum approach, this approach requires partial-sum memory and addressing, as well as a high input sampling rate. The interpolation beamformer is shown to eliminate the need for a high input sampling rate; in most applications, the savings in A/D converters, cable bandwidth, and input data storage generally offset the additional complexity required for interpolation. The application of frequency-domain concepts is shown to eliminate the need for a high input sampling rate also. For bandpass applications, both interpolation with complex sampling and shifted-sideband beamforming are shown to reduce the input sampling requirements significantly and, hence, the input data storage requirements.