Performance of digital integrated circuit technologies at very high temperature
Abstract
Results of investigations of the performance and reliability of digital bipolar and CMOS integrated circuits over the 25 to 340 C range are reported. Included in these results are both parametric variation information and analysis of the functional failure mechanisms. Although most of the work was done using commercially available circuits (TTL and CMOS) and test chips from commercially compatible processes, some results of experimental simulations of dielectrically isolated CMOS are also discussed. It was found that commercial Schottky clamped TTL, and dielectrically isolated, low power Schottky-clamped TTL, functioned to junction temperatures in excess of 325 C. Standard gold doped TTL functioned only to 250 C, while commercial, isolated L functioned to the range 250 C to 275 C. Commercial junction isolated CMOS buffered and unbuffered, functioned to the range 280 C to 310 C depending on the manufacturer. Experimental simulation of simple dielectrically isolated CMOS integrated circuits, fabricated with heavier doping levels than normal, functioned to temperatures in excess of 340 C. High temperature life testing of experimental silicone-encapsulated simple TTL and CMOS integrated circuits have shown no obvious life limiting problems to data. No barrier to reliable functionality of TTL bipolar or CMOS integrated circuits at temperatures in excess of 300 C was found.
- Publication:
-
NASA STI/Recon Technical Report N
- Pub Date:
- March 1980
- Bibcode:
- 1980STIN...8025550P
- Keywords:
-
- Cmos;
- High Temperature;
- Integrated Circuits;
- Failure Analysis;
- Performance;
- Reliability;
- Electronics and Electrical Engineering