Power design for gigabit Josephson logic systems
Abstract
An ac power system design is described for powering, at near gigahertz frequencies, 16 K Josephson latching logic circuits distributed uniformly over 16 chips. The power system distributes a sinusoidal current waveform from a single source to the many chip quadrants through a tree system of thinfilm transformers that have branching secondaries and multiple turn primaries to maintain nearly constant current amplitudes throughout the system and small phase skews at the logiccircuit level. The sinusoidal waveform is clipped onchip to provide the trapezoidal waveform required by the logic circuits. The ratio of the duration of the upportion of the trapezoidal halfcycle to the halfcycle period (the logic cycle) is defined as the active duty cycle for the logic. The 16 K circuitpower design is capable of providing an 80percent duty cycle at a 1.7ns logic cycle while keeping current levels in the system below 300 mA. An approximate expression is derived that predicts that for any powersystem design of this type the product of the system size, the highest frequency of operation, and the chipquadrant current level is a constant.
 Publication:

IEEE Transactions on Microwave Theory Techniques
 Pub Date:
 May 1980
 DOI:
 10.1109/TMTT.1980.1130108
 Bibcode:
 1980ITMTT..28..500A
 Keywords:

 Josephson Junctions;
 Logic Circuits;
 Microwave Circuits;
 Network Synthesis;
 Power Supply Circuits;
 Voltage Converters (Ac To Ac);
 Chips (Electronics);
 Electric Power Supplies;
 Lc Circuits;
 Thin Films;
 Electronics and Electrical Engineering