Computer-aided engineering of semiconductor integrated circuits

Economical procurement of small quantities of high performance custom integrated circuits for military systems is severely impeded by inadequate process, device and circuit models that handicap accurate computer-aided design at low cost. The salient objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large scale integrated circuit subsystems to reduce development cycle time and cost. The basic areas under investigation are: (1) ion implantation and diffusion of dopants, (2) thermal oxidation, (3) chemical vapor deposition of silicon, (4) device simulation and (5) analytical measurements. This report provides a detailed development of research results in developing computer-aids for modeling the IC fabrication process. The effort is vertically integrated and the outcome is the widely distributed SUPREM program. Moreover, device analysis capabilities have been developed based on SUPREM and applications have demonstrated. The impact of this effort on the design of custom VLSI is apparent and future research will explore, define and model the limits of technology for VLSI.