Application of CCDs to memories

Basic concepts of CCD digital memory systems are discussed with reference to digital operation of CCD and input/output techniques for CCD registers, CCD memory organization, design considerations, evaluation of CCD memories, and comparison of CCD memories to MOS random access memories (RAMs). The CCD memories offer a packing-density advantage over the dynamic RAM in the range 2-4. However, CCDs are serial memories with random-addressable loops with the number of bits in each loop in the range of 256 to 4000 and average latency times in the range of 100-400 ms. Thus, for applications where the CCD memory is used as a buffer between the very low-cost magnetic main memory and the high-speed RAM, there is a trade-off between the competitive price of the CCD memory and its latency time. Other considerations in the development of high-capacity CCD memory chips will be their dimensions, built-in redundancy, error-detection and error-correction capability, and built-in testability.