Fabrication technology for charge-coupled devices

The paper concentrates on CCD devices fabricated in silicon because of the highly developed process technology available with this material. It is shown that narrow gaps and well-controlled inter-electrode potentials can be obtained using: (1) shadow mask metal deposition, (2) wide gaps with a resistive sea, and (3) overlapping electrodes. Two-phase potential-well asymmetry can be obtained using stepped oxides or implanted barriers. These techniques are illustrated by examples of various electrode structures in which they are employed. Process optimization techniques are discussed with reference to charge-transfer inefficiency and dark current which are two of the major performance limitations of the CCD. Consideration is also given to polysilicon electrode technologies, buried-channel devices, and integration of peripheral components.