A nonrecursive signal integrator using a parallel CCD structure
Abstract
The CCD implementation of a nonrecursive integrator is proposed which requires only commercially available CCD delay lines together with conventional analog and digital techniques for driving and addressing the CCDs. A simulation of such a system employing one CCD established the feasibility of the parallel transfer approach adopted. The distortion inherent in a voltage-sensed version of this integrator and the integration improvement attainable are in agreement with theoretical predictions.
- Publication:
-
IEEE Journal of Solid-State Circuits
- Pub Date:
- August 1979
- DOI:
- Bibcode:
- 1979IJSSC..14..742T
- Keywords:
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- Charge Coupled Devices;
- Delay Lines;
- Digital Techniques;
- Integrators;
- Block Diagrams;
- Digital Systems;
- Solid State Devices;
- Electronics and Electrical Engineering