A CCD memory chip for radar image processing
Abstract
Considerations for the design of a digital CCD memory are discussed. Starting from commercial CCD devices, the design characteristics of a second generation CCD were derived. The economically feasible capacity and its dependency on the technology lead to the definition of performance parameters and the chip organization. A SPS organization was found most suitable and design considerations of SPS blocks are summarized. The overal design of a 32 kbit CCD is described.
- Publication:
-
In AGARD Impact of Charge Coupled Devices and Surface Acoustic Wave Devices on Signal Process. and Imagery in Advanced Systems 10 p (SEE N78-31279 22-31
- Pub Date:
- June 1978
- Bibcode:
- 1978iccd.agarR....R
- Keywords:
-
- Charge Coupled Devices;
- Chips (Memory Devices);
- Image Processing;
- Radar Imagery;
- Signal Processing;
- Computer Storage Devices;
- Digital Data;
- Moving Target Indicators;
- Radar Transmission;
- Surveillance Radar;
- Communications and Radar