PSK demodulator (phase 2)
Abstract
Telecommanding of ESA satellite was made in PCM according to a standard whose composite video signal includes clock information (by an AM modulation), the suppression of which was foreseen. The influence of such a suppression and the optimization of some functions of the demodulator were investigated. A complete demodulator block diagram was implemented. The seven modules of the breadboard demodulator are described. Results obtained from PLL computer simulations and breadboard measurements were in agreement. Two mechanizations for clock recovery were studied and a simplified diagram was obtained. A squelch circuit, implemented for the protection against false commands, used medium scale integration circuit with CMOS technologic. Test data on the overall demodulator are included.
- Publication:
-
NASA STI/Recon Technical Report N
- Pub Date:
- February 1978
- Bibcode:
- 1978STIN...7917080R
- Keywords:
-
- Audio Frequencies;
- Equipment Specifications;
- Phase Demodulators;
- Phase Shift Keying;
- Bits;
- Breadboard Models;
- Clocks;
- Cmos;
- Error Analysis;
- Phase Locked Systems;
- Communications and Radar