Master-slice layout design for emitter coupled logic LSI

Consideration is given to a master-slice structure on which many high-speed circuits can be integrated. The master slice has the following features: (1) input/output level converters make for compatibility with ECL and lower power dissipation, (2) reference circuits permit a hierarchical treatment of signal levels and cell layout, thus leading to circuit flexibility, (3) two-power supply voltages can be used, reducing power dissipation, and (4) CAD is applicable. Tests showed that the maximum integration of this master slice is about 250 gates; such LSI was realized by taking advantage of the great flexibility of circuit design and capacity for many wires.