A binary quantized digital phase locked loop - A graphical analysis
Abstract
A graphical method pointing out cycle slippings and limit-cycles phenomena has been used to evaluate the acquisition behavior of a nonuniform sampling DPLL (digital phase locked loop) with a hard limit as quantizer. A sufficient condition for avoiding cycle slipping has been determined along with an upper bound on the pull-in range. A derivation for a closed-form expression for the acquisition time is presented. Using the random-walk technique, the stationary-phase error variance, the mean acquisition time, and the mean first slip time for a phase-step input are examined.
- Publication:
-
IEEE Transactions on Communications
- Pub Date:
- September 1978
- Bibcode:
- 1978ITCom..26.1355D
- Keywords:
-
- Binary Data;
- Data Transmission;
- Digital Systems;
- Graphs (Charts);
- Performance Prediction;
- Phase Error;
- Phase Locked Systems;
- Acquisition;
- Feedback Control;
- Random Walk;
- Signal Detection;
- Transient Response;
- Transmission Efficiency;
- Variance (Statistics);
- Communications and Radar