Digital design of general LC structures
Abstract
In this paper the concept of a generalized delay is introduced and a method is developed for delay-free canonical digital realization of an arbitary reactance function. This method is an alternative approach and a generalization to the problem of digital realization of LC ladder structures.
- Publication:
-
IEEE Transactions on Circuits Systems
- Pub Date:
- May 1978
- Bibcode:
- 1978ITCS...25..269E
- Keywords:
-
- Digital Systems;
- Lc Circuits;
- Network Synthesis;
- Time Lag;
- Design Analysis;
- Digital Filters;
- Electrical Impedance;
- Ladders;
- Laplace Transformation;
- Reactance;
- Rlc Circuits;
- Signal Processing;
- Electronics and Electrical Engineering