This paper describes the initial design of a comprehensive hierarchical integrated circuit design system, that is currently being implemented at Stanford University. This system encourages the use of structured hardware design techniques. It is intended for the design and layout of large-scale integrated circuits by means of a combination of manual and algorithmic techniques.
NASA STI/Recon Technical Report N
- Pub Date:
- November 1977
- Circuit Diagrams;
- Integrated Circuits;
- Large Scale Integration;
- Electronics and Electrical Engineering