The effect of current suppression in the pn-n+ diode of integrated injection logic
Abstract
The j- V characteristics of the pn-n+ diode are derived by combining the different current components in the n- region of the diode for various bias voltages. For infinitly fast recombination, the expression for the current density as a function of bias reduces to that of a conventional one-dimensional theory. For finite recombination, however, the expression deviates significantly from the usual expression. In fact, contrary to what would be expected from the conventional theory, the current increases as the width of the neutral n- region increases for a constant bias. Finally the results of the analysis of the pn-n + diode are applied to an analysis of the current gain in the integrated injection logic ( I2L) device. A qualitative discussion of the current gain for the lateral pnp transistor and for that of the vertical npn transistor is given.
- Publication:
-
Solid State Electronics
- Pub Date:
- January 1977
- DOI:
- 10.1016/0038-1101(77)90028-4
- Bibcode:
- 1977SSEle..20...19Y