Digital charge-coupled logic /DCCL/
Abstract
DCCL technology and possible applications are surveyed. The present state of DCCL art, design with digital gates, DCCL advantages, radiation and temperature effects on performance, logic and arithmetic functions handled by DCCL, and noise performance are discussed. DCCL full-adders and other full-adders (CMOS, PMOS, NMOS, IIL, TDB) are compared re: power drain, array packing density, SNR, and transfer efficiency. Expected benefits from DCCL include: integration of memory, logic, and arithmetic functions on a single LSI chip; chips capable of performing many complex functions with low power drain; accuracy fixed and limited only by number of bits per word; functions alterable electronically in real time; and imperviousness to environmental conditions.
- Publication:
-
IEEE Journal of Solid-State Circuits
- Pub Date:
- October 1977
- DOI:
- 10.1109/JSSC.1977.1050940
- Bibcode:
- 1977IJSSC..12..473Z
- Keywords:
-
- Arithmetic And Logic Units;
- Charge Coupled Devices;
- Digital Systems;
- Large Scale Integration;
- Logic Circuits;
- Performance Prediction;
- Adding Circuits;
- Chips (Memory Devices);
- Gates (Circuits);
- Logical Elements;
- Packing Density;
- Radiation Effects;
- Signal To Noise Ratios;
- Temperature Effects;
- Electronics and Electrical Engineering