High-voltage CMOS decoder/driver for plasma displays

A high voltage complementary MOS process which yields N-channel double-diffused MOS transistors and P-channel MOS transistors with drain to source breakdown voltage of 120 volts has been devised. Based on this process, CMOS circuits for both the X and Y axis decoder/drives for the plasma panel are designed. An experimental version of an integrated X decoder/driver with 8 output drive lines was fabricated. Tests on this circuit confirmed the feasibility of the CMOS approach to integrate the plasma panel drive circuitry.