Avalanche breakdown in high-voltage D-MOS devices
Abstract
A voltage breakdown occurring in high-voltage D-MOS transistors is described. This effect severely reduces the high-voltage capability of these devices when the gate field plate is extended through the drift region toward the n(plus) drain contact region. The breakdown is shown to be due to an avalanche phenomenon appearing close to the n(plus) region as a result of the very high field induced in this MOS structure in nonequilibrium. A first-order theory is developed to confirm the conclusions of the experimental study.
- Publication:
-
IEEE Transactions on Electron Devices
- Pub Date:
- January 1976
- DOI:
- 10.1109/T-ED.1976.18337
- Bibcode:
- 1976ITED...23....1D
- Keywords:
-
- Electron Avalanche;
- Field Effect Transistors;
- High Voltages;
- Metal Oxide Semiconductors;
- Integrated Circuits;
- Nonequilibrium Conditions;
- P-N Junctions;
- Volt-Ampere Characteristics;
- Electronics and Electrical Engineering